The ports of the MSP430 are P1, P2, P3, P4, P5, P6, S, and COM. (The models included are not the same. For example, the MSP430X11X series only has P1 and P2 ports, while the MSP430X4XX series includes all the above ports.) All can be used directly for input/output. There are no special input/output instructions in the MSP430 system. Input/output operations are implemented by transmitting instructions. Each bit of port P1`P6 can be used independently for input/output, ie it has a bit addressing function. The common keyboard interface can be simulated directly with the port, using query or interrupt mode control. Because the port of the MSP430 only has data ports, there are no status ports or control ports. In actual applications, for example, in the case of query-type input/output transmission, one or more bits of the port can be used to transmit status information, and the corresponding bits can be queried. Status to determine if the peripheral is in the "Ready" state. The function of the port. (1) P1, P2 ports: I/O, interrupt function, other on-chip peripheral functions such as timers, comparators; (2) P3, P4P5P6 ports: I/O, other on-chip peripheral functions such as SPI, UART mode, A/D conversion, etc.; (3) S, COM port: I/O, driving liquid crystal. Each MSP430 port has a rich set of control registers for the user to perform the corresponding operations. Among them P1, P2 have 7 registers, P3~P6 have 4 registers. By setting the registers we can implement: (1) independent programming of each I/O bit; (2) arbitrary combination of input, output and interrupt; (3) all 8 bits of P1 and P2 can be used as external interrupt processing; (4) ) You can use all the instructions to operate on the register; (5) You can input, output, or perform operations in bits. The functions of ports P1, P2 can be implemented by their 7 control registers. Here, Px represents P1 or P2. (1) PxDIR: Input/output direction register. The 8 bits are independent of each other and can define the 8 pin input/output directions respectively. 8 bits are reset after PUC. When using the input/output function, the direction of the port should be defined first. Can only be read as input, as output, readable and writable. 0: input mode; 1: output mode. Such as: P1DIR | = BIT4; / / P1.4 output, P2DIR = 0XF0; / / high 4-bit output, low 4-bit input. (2) PXIN: Input register, read-only register. The user cannot write to it and can only know the input signal of the I/O port by reading the contents of its register. So the direction of its pins should be selected as input. For example, keyboard keyboard scanners often need to read the line or column port register values ​​to determine the case. For example: unsigned char key; P1DIR&=~BIT4; //P1.4 input ...... Key=P1IN&0X10; //Output port P1.4 value ...... (3) PXOUT: Output register. This register is the output buffer register of the I/O port. The contents of the output buffer when read again are irrelevant to the definition of the pin direction. Change the contents of the direction register and the contents of the output buffer are not affected. Such as: PIOUT | = 0X01; / / P1.0 output 1, PIOUT & = ~ 0X01; / / P1.0 output 0. (4) PXIFG: Interrupt flag register. His eight flags indicate whether there is an interrupt request pending on the corresponding pin. 0: No interrupt request, 1: Interrupt request. The break flags are PXIFG.0~PXIFG.7. It should be noted that PXIFG.0~PXIFG.7 share an interrupt vector and is a multi-source interrupt. When the interrupt caused by any event is processed, PXIFG.0~PXIFG.7 will not be reset automatically. It is necessary to determine which event the software is for and reset the corresponding flag. In addition, the duration of the external interrupt event must be maintained at no less than 1.5 times the MCLK time to ensure that the interrupt request is accepted and the corresponding interrupt flag is set. (5) PXIES: interrupt trigger edge select register. If one of the pins of the PX port is allowed to be interrupted, the interrupt trigger mode of the pin must also be defined. 0: The rising edge trigger sets the corresponding flag. 1: The falling edge triggers the corresponding flag to be set. For example: MOV.B #07H, &P1IES ; p1 low 3-bit falling edge triggers an interrupt. (6) PXIE: Interrupt enable register. Each pin of the PX port has a bit to control whether the pin allows interrupts. 0: Disable interrupts. 1: Enable interrupts. MOV.B #0E0H, &P2IE ; P2 high 3 bits allow interrupts. (7) PXSEL: Function selection register. The P1 and P2 ports also have other on-chip peripheral functions. These functions and off-chip connections are realized by multiplexing P1 and P2 pins. PXSEL is used to select the pin's I/O port function and peripheral module function. 0: Select pin as I/O port, 1: Select pin as peripheral module function. Such as: P1SEL | = 0X10; //P1.4 is a peripheral module function. Ports P3, P4, P5, and P6 have no interrupt capability, and the remaining functions are the same as PI and P2. Remove the three registers associated with the interrupt ports P1, P2 and the four registers P3, P4, P5, and P6 (used with P1, P2) are PXDIR, PXIN, PXOUT, and PXSEL, respectively. Port COM and S, they realize the direct interface with the liquid chip. COM is the common end of the liquid chip, and S is the segment code end of the liquid chip. The output of the liquid chip can also be configured as a digital output port via software.
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